Dr Partha De

Headshot of Partha De For media enquiries please contact the Press Team
Senior Lecturer
Faculty:
Faculty of Science and Engineering
School:
Computing and Information Science
Location:
Cambridge
Research Supervision:
Yes

Partha De is a Senior Lecturer in Embedded Computing and Machine Learning in ARU's School of Computing and Information Science, and an Honorary Fellow in the School of Computing at the University of Melbourne. His primary research interests include side-channel attack-resistant hardware design and edge AI architectures.

His work spans pre-silicon leakage modelling, cryptography, and low-power VLSI design. He is also working on early-stage leakage detection in RISC-V and ARM processors and has contributed to the design and implementation of post-quantum cryptographic algorithms.

[email protected]

View Partha's Google Scholar profile

View Partha's GitHub profile

Background

Partha served as a Postdoctoral Researcher at the Centre for Hardware Security in the Department of Computer Systems at Tallinn University of Technology (TalTech). He also worked as a Postdoctoral Researcher in the Cyber Security Lab at Alpen-Adria-Universität Klagenfurt.

He completed his PhD at the School of Computing and Information Systems, University of Melbourne, and obtained his MS from the Department of Computer Science and Engineering at the Indian Institute of Technology (IIT) Kharagpur. He also holds a Post Graduate Diploma in Information Technology (PGDIT) from IIT Kharagpur.

Spoken Languages

Bengali

Research interests
  • Edge AI
  • Side channel attack resistant hardware design
  • Pre-silicon leakage detection
  • RISC-V
  • Instruction based leakage analysis of ARM processor
  • Low power VLSI
Areas of research supervision
  • Edge AI
  • Side channel attack resistant hardware design
  • Pre-silicon leakage detection
  • Instruction based leakage analysis of ARM processor
Teaching
  • Introduction to Programming
  • Computing Research Methodologies
  • Professional Experience Computing Project 1
Qualifications

PhD, School of Computing and Information Systems, The University of Melbourne.

MS Computer Science and Engineering, Indian Institute of Technology Kharagpur.

Post Graduate Diploma in Information Technology, (PGDIT), Indian Institute of Technology Kharagpur.

BTech, Computer Science and Engineering, West Bengal University of Technology.

Research grants, consultancy, knowledge exchange
  • Visiting Fellow, School of Computing, University of Melbourne
  • Melbourne Research Scholarship
  • MIPP Scholarship
Selected recent publications

De, P., Parampalli, U. and Mandal, C. (2020) 'Secure path balanced BDD based pre-charge logic for masking', IEEE Transactions on Circuits and Systems I, 67(12), pp. 4747-4760.

De, P., Mandal, C. and Parampalli, U. (2019) 'Path-Balanced Logic Design to Realize Block Ciphers Resistant to Power and Timing Attacks', IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 27(5), pp. 1080-1092.

Recent presentations and conferences

De, P. and Mandal, C. (2025) 'Design Space Exploration Through Architecture Driven, High-level Synthesis', OPTIM-ACEMP 2025: Optimization of Electrical & Electronic Equipment and Aegean Conference on Electrical Machines and Power Electronics, Timisoara, Romania, June.